This invention relates generally to a superconducting switching device using a superconducting tunnel junction (Josephson junction). More particularly, the present invention relates to the structure of the superconductiong switching device which reduces the number of layers of the device as a whole and is particularly suitable for miniaturization and for improvement of the reliability of the production process.
The structure disclosed by the article of Gheewala ("Design of 2.5-Micrometer Josephson Current Injection Logic (CIL)", T. R. Gheewala, IBM, J. Res. Develop. Vol. 24, No. 2, p130 (1980) ) has been widely used in the past as the structure for superconducting switching devices. The sectional structure of these devices is illustrated in FIG. 1. In the devices having such a structure, a control line 9 for controlling a superconducting quantum interference device (SQUID) is disposed at the upper part of a superconducting interferometer via an insulating film 8 consisting of Sio, for example. In the device, the control line film must have the smallest line width possible. Since the control line film is disposed at the upper part of the junction, however, it must pass through the step portion where the difference of the height is the greatest. This means that there is a high probability that breakage of the control line film will develop at the step portion. To avoid this problem, the control line film must be thick. Unfortunately, if the film thickness is increased the minimum value of the line width that can be realized becomes undesirably large.
In the conventional device structure, the control line film is disposed on the tunnel junction via an inter-layer insulating film so that there is a large number of films in the direction of thickness of the substrate. Hence, it is highly probable that defects will occur in the pattern, interconnection and device characteristics.
Incidentally, in FIG. 1, reference numeral 1 is a single crystal silicon wafer; 2 is a magnetic shielding film; 3 is an anodic oxidation film; 4 is an inter-layer insulating film consisting of SiO; 5 is a base electrode of a tunnel junction; 6 is an inter-layer insulating film consisting of SiO; 7 is a counter electrode; 10 is a tunnel junction barrier layer; 11 is a thermal oxidation silicon layer; and 12 is a resistance film.
The following reference are cited to show the state of the art.
(1) U.S. Pat. No. 3,803,459
(2) Japanese Patent Laid-Open No. 118392/1974
(3) T. R. Gheewala; IBM J. Res. Develop., Vol. 24, No. 2 (March 1980), page 130